Designing Novel CPU Instructions for Thread Synchronization, Memory Management, Cache Communication, Etc.
1 faculty research Designing Novel CPU Instructions for Thread Synchronization, Memory Management, Cache Communication, Etc. on GradNova.
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Algorithms for Recent Technologies Like Non-Volatile Memory, Transactional Memory, Remote Direct Memory Access (rdma)
Designing Novel CPU Instructions for Thread Synchronization, Memory Management, Cache Communication, Etc.
High Performance Memory Allocators and Safe Reclamation for Concurrent Software
Parallel, Concurrent and Distributed Data Structures, Especially Lock-Free Ones